1. Field of the Invention
The present invention relates to a semiconductor device, more particularly to a semiconductor device equipped with conformation difference detection circuits for detecting a layering difference of semiconductor integrated circuits.
2. Description of the Prior Art
In general, in a semiconductor device comprising semiconductor integrated circuits, the conformation difference of the semiconductor integrated circuits is always inspected for product inspection of the semiconductor device.
At the time of conformation difference inspection, for example, a vernier pattern previously formed on a substrate of a semiconductor device is used.
At the time of conformation difference inspection by the vernier pattern, an operator inspects the conformation difference using an optical microscope or the like.
Further, Japanese Patent Laid-Open No. 5-3237 discloses a method using detection patterns composed of a lower layer pattern and an upper layer pattern mutually crossing each other and both formed in a void region of a semiconductor device as a technique of inspecting the conformation difference of respective wiring layers. This technique carries out conformation difference inspection of a semiconductor device by measuring the electric resistance at a prescribed point of the lower layer pattern, a detection pattern and calculating the conformation difference based on the measured value.
Further, one example of general detection patterns used conventionally is illustrated in FIG. 15.
In the conventional example illustrate in FIG. 15, the detection pattern is provided with conformation margin widths D51, D54 respectively in the X-direction and Y-direction surrounding the contact faces of a plurality of through holes 53 in the respective upper and lower layer wirings 51, 54 sides of the contacting faces of the through holes 53 and the respective upper and lower layer wirings 51, 54. In this case, the foregoing conformation margin width D51 shows the conformation margin width in the foregoing lower layer wiring 31 side and the foregoing conformation margin width D54 shows the conformation margin width in the foregoing upper layer wiring 54 side, respectively. Further, the foregoing respective conformation margin widths D51, D54 show the same widths, respectively, in the X-direction and the Y-direction. Incidentally, in FIG. 15, the reference character X denotes the X-direction; the reference character Y denotes the Y-direction; the reference numeral 50 denotes a circuit substrate; and the reference numeral 52 denotes an insulating layer.
In this case, for example, if conformation difference takes place in lower layer wirings 51 and through holes 53 and the electric resistance of each through hole 53 increases by b(delta), the electric resistance increase in the entire detection pattern is the product of xcex4xc3x97N wherein the reference character N denotes the total number of the through holes. Based on the electric resistance increase xcex4xc3x97N, whether the conformation difference is within an allowable range or not is determined. In the case, the reference character N denotes a natural number.
In such a manner, since the increase of the electric resistance of each through hole 53 is generally slight, about several ohm, the abnormality of through holes is detected by measuring the electric resistance of the entire detection pattern.
Object of the Invention
However, although the conventional example using the above described vernier pattern is capable of detecting the conformation difference, there occur problems that, for example, disconnection or the like of the lower layer wirings, caused by a photolithographic technique or an etching technique relevant to semiconductor device fabrication cannot be detected and that the inspection precision of the fine technique is limited owing to the optical inspection by an optical microscope.
Further, in the technique disclosed in Japanese Patent Laid-Open No. 5-3237 and employing the detection pattern, although the technique can detect the disconnection of the lower layer wirings, there occurs a problem that the formation abnormality of through holes caused by photolithographic technique or the like cannot precisely be detected since the pattern cannot have the structure to measure the electric resistance in the inside of a through hole in the detection pattern.
Moreover, in the conventional example using the detection pattern illustrated in FIG. 15, although the conformation difference of a semiconductor device can be inspected, the conformation margin widths D51, D54 in the detection pattern are set to be mutually equal in the X-direction and the Y-direction. For that, if there occurs conformation difference, gaps are formed in the contact faces of the through holes 53 owing to the excess of the conformation difference widths D51, D54 independently of the X-direction and the Y-direction to result in increase of the electric resistance in the entire detection pattern. Consequently, a problem takes place that the direction of the conformation difference cannot be detected.
The present invention is to solve such problems of a conventional example and more particularly to provide a semiconductor device in which it is made possible to detect the direction of conformation difference of respective wiring layers of semiconductor integrated circuits and to increase the detection sensitivity.
Summary of the Invention
In order to attain the above described purposes, the respective inventions as set forth in claim 1 to claim 5 propose a semiconductor device having a common basic structure comprising: one or more of semiconductor integrated circuits formed on a semiconductor substrate; and conformation difference detection circuits formed on the same semiconductor substrate; to detect the layering difference of the semiconductor integrated circuits,
wherein the conformation difference detection circuits are so composed of a plurality of lower layer wirings formed on the semiconductor substrate, a plurality of upper layer wirings layered on the lower layer wirings through insulating layers, through holes successively and respectively contacting the respective upper layer wirings and the lower layer wirings in prescribed directions, and electrode terminal faces set in both end parts of the circuits composed of the lower layer wirings and the upper layer wirings contacted through the through holes as to keep conformation margins with prescribed widths surrounding the contact faces of the through holes in the respective wiring sides in the contacting faces of the through holes and the respective wirings; and
the widths of the conformation margins are so adjusted as to be narrower in one prescribed direction than the direction other than the prescribed direction.
For that, in the present invention as set forth in claim 1 to claim 5, gaps are made easy to be formed in the through hole contact faces in the one direction and as compared with a case where conformation difference in a prescribed extent is caused in the other direction, in the case where conformation difference in a prescribed extent is caused in the one direction, it is easy to exceed the conformation margin width. Consequently, even if a slight conformation difference takes place in the one direction, the conformation margin width is exceeded and, therefore, gaps are formed in the through hole contact faces in the one direction and the electric resistance of a conformation difference detection circuit increases and exceeds an allowable range. As a result, the detection sensitivity of conformation difference caused in a specified direction can be improved.
In this case, the prescribed circuits composed of the lower layer wirings and the upper layer wirings contacted through a plurality of through holes may be formed to be contacted circuits by continuously extending the circuits as a whole in one prescribed direction in a prescribed length.
Doing so, the electric resistance in conformation difference detection circuits is further increased corresponding to the extent of the contacted circuits even if slight conformation difference takes place in the one prescribed direction.
Further, regarding the foregoing contacted circuits, at least two rows of the circuits are formed and the respective contacted circuits may be connected in series.
Doing so, the electric resistance in conformation difference detection circuits is considerably increased corresponding to the increase of the contacted circuits connected in series even if slight conformation difference takes place in the one prescribed direction.
Further, the foregoing contacted circuits of the lower layer wirings and the upper layer wirings are made to be continued patterns in rectangular wavy form in one direction observed in a plane and at the same time the foregoing through holes are formed in the respective bending parts of the rectangular wavy continued patterns.
Doing so, even if slight conformation difference takes place in one direction, the electric resistance of the continued patterns is reliably increased and exceeds the allowable range.
Further, the foregoing one prescribed direction may be set to be X-direction and the other direction to be Y-direction.
Doing so, if a slight conformation difference takes place in X-direction at right angles to the Y-direction, the electric resistance of the conformation difference detection circuits is increased.
The respective inventions as set forth in claim 6 to claim 8 propose a semiconductor device having a common basic structure comprising one or more of semiconductor integrated circuits formed on a semiconductor substrate and conformation difference detection circuits formed on the same semiconductor substrate to detect the layering difference of the semiconductor integrated circuits:
wherein the conformation difference detection circuits are so composed of a plurality of lower layer wirings formed on the semiconductor substrate, a plurality of upper layer wirings layered on the lower layer wirings through insulating layers, through holes successively and respectively contacting the respective upper layer wirings and the lower layer wirings in prescribed directions, and electrode terminal faces set in both end parts of the circuits composed of the lower layer wirings and the upper layer wirings contacted through the through holes as to keep conformation margins with prescribed widths surrounding the contact faces of the through holes in the respective wiring sides in the contacting faces of the through holes and the respective wirings;
the circuits composed of a plurality of the lower layer wirings and a plurality of the upper layer wirings contacted through the through hole parts are made to be two independent contacted circuits extended respectively in the X-direction and the Y-direction as a whole; and
the widths of the conformation margins are so adjusted as to be narrower in the X-direction than in the Y-direction in the X-direction contacted circuits and the widths are so adjusted as to be narrower in the Y-direction than in X-direction in the Y-direction contacted circuits.
For that, in the respective inventions as set forth in claim 6 to claim 8, gaps are easy to be formed in the through hole contact faces in the X-direction in the X-direction contacted circuits and gaps are easy to be formed in the through hole contact faces in the Y-direction in the Y-direction contacted circuits. Consequently, in the X-direction contacted circuits, it is easy to exceed the conformation margin width in the case where conformation difference is caused in the X-direction as compared with a case where conformation difference is caused in the Y-direction. On the other hand, in the Y-direction contacted circuits, it is easy to exceed the conformation margin width in the case where conformation difference is caused in the Y direction as compared with a case where conformation difference is caused in the X-direction. Hence, in the case where a slight conformation difference takes place in the X-direction, the conformation margin width of the X-direction contacted circuits is exceeded and, therefore, gaps are formed in the through hole contact faces in the X-direction exceeding the conformation margin width of the X-direction contacted circuits in the X-direction side to increase the electric resistance of the X-direction contacted circuits and to make the electric resistance to exceed an allowable range. On the other hand, in the case where a slight conformation difference takes place in the Y-direction, the conformation margin width of the Y-direction contacted circuits is exceeded and, therefore, gaps are formed in the through hole contact faces in the Y-direction exceeding the conformation margin width of the Y-direction contacted circuits in the Y-direction side to increase the electric resistance of the Y-direction contacted circuits and to make the electric resistance to exceed an allowable range. As a result, conformation difference caused in both directions can simultaneously be detected.
Further, if conformation difference is caused in either the X-direction or the Y-direction, corresponding to the extent of the contacted circuits, either the X-direction contacted circuits or the Y-direction contacted circuits, the electric resistance of the X-direction contacted circuits or the Y-direction contacted circuits is further increased. Consequently, the detection sensitivity of the conformation difference caused in both directions is improved.
Incidentally, each of the X-direction contacted circuits and the Y-direction contacted circuits may be composed of a plurality of rows of contacted circuits respectively connected in series.
Doing so, if conformation difference is caused in the X-direction or the Y-direction, corresponding to the extent of the increase of the contacted circuit connected in series, the electric resistance of the X-direction contacted circuits or the Y-direction contacted circuits is considerably increased.
Further, each of the foregoing X-direction contacted circuits and Y-direction contacted circuits may be formed to be continuous and rectangular wavy patterns in one direction when observed in a plane and through holes may be formed in the respective bending parts of the continuous and rectangular wavy patterns.
Doing so, if conformation difference is caused in the X-direction or the Y-direction, the electric resistance of the X-direction contacted circuits or the Y-direction contacted circuits is reliably increased and exceeds the allowable range.
The invention as set forth in claim 9 proposes a semiconductor device comprising one or more of semiconductor integrated circuits formed on a semiconductor substrate and conformation difference detection circuits formed on the same semiconductor substrate to detect the layering difference of the semiconductor integrated circuits:
wherein the conformation difference detection circuits are composed of a plurality of rows of circuit parts-to-be-measured and channel switching circuit parts for separately selecting the circuit parts-to-be-measured and contacting the selected circuit parts to a measuring apparatus in the outside;
each of the circuit parts-to-be-measured in a plurality of rows comprises a contacted circuit composed of a plurality of lower layer wirings and a plurality of upper layer wirings formed on the semiconductor substrate and through holes respectively successively contacting the terminal parts of respective upper layer wirings and the lower layer wirings in prescribed directions;
the electric resistance values of the respective circuit parts-to-be-measured are so adjusted as to be gradually increased to be higher than the electric resistance value of a specified circuit part-to-be-measured positioned in the center in both neighboring sides toward outside; and
in relation to the electric resistance values of the respective circuit parts-to-be-measured positioned at object positions in both sides of the foregoing specified circuit part-to-be-measured in the center, the positioning difference of the through holes from the lower layer wirings and the upper layer wirings of circuit parts-to-be-measured positioned in one side is so set as to be a specified value obtained by keeping the positioning difference all over to a prescribed extent in one direction along the extension direction of circuit parts-to-be-measured; and at the same time
the positioning difference of the through holes from the lower layer wirings and the upper layer wirings of circuit parts-to-be-measured positioned in the other side is so set as to be a specified value obtained by keeping the positioning difference all over to a prescribed extent, which is same as that of the circuit parts-to-be-measured positioned in the foregoing one side, in one direction along the extension direction of circuit parts-to-be-measured.
For that, in the semiconductor device of the invention as set forth in claim 9, if conformation difference is caused in one defined direction, the data of electric resistance values of easily changeable respective different circuit parts-to-be-measured is successively outputted to the outside at a high speed. Consequently, conformation difference detection caused in a specified one direction can quickly be carried out.
The invention as set forth in claim 10 is a semiconductor device comprising one or more of semiconductor integrated circuits formed on a semiconductor substrate and conformation difference detection circuits formed on the same semiconductor substrate to detect the layering difference of the semiconductor integrated circuits:
wherein the conformation difference detection circuits are composed of two detection circuits separately formed in the X-direction and the Y-direction, respectively and each difference detection circuit in the X-direction and the Y-direction is composed of a plurality of rows of circuit parts-to-be-measured and channel switching circuit parts for separately selecting the circuit parts-to-be-measured and contacting the selected circuit parts to a measuring apparatus in the outside;
each of the circuit parts-to-be-measured in a plurality of rows comprises a contacted circuit composed of a plurality of lower layer wirings and a plurality of upper layer wirings formed on the semiconductor substrate and through holes respectively successively contacting the terminal parts of respective upper layer wirings and the lower layer wirings in prescribed directions;
the electric resistance values of the respective circuit parts-to-be-measured are so adjusted as to be gradually increased to be higher values than the electric resistance value of a specified circuit part-to-be-measured positioned in the center in both neighboring sides toward outside; and
in relation to the electric resistance values of the respective circuit parts-to-be-measured positioned at object positions in both sides of the foregoing specified circuit part-to-be-measured, the positioning difference of the through holes from the lower layer wirings and the upper layer wirings of circuit parts-to-be-measured positioned in one side is so set as to be a specified value obtained by keeping the positioning difference all over to a prescribed extent in one direction along the extension direction of circuit parts-to-be-measured; and at the same time
the positioning difference of the through holes from the lower layer wirings and the upper layer wirings of circuit parts-to-be-measured positioned in the other side is so set as to be a specified value obtained by keeping the positioning difference all over to a prescribed extent, which is same as that of the circuit parts-to-be-measured positioned in the foregoing one side, in one direction along the extension direction of circuit parts-to-be-measured.
For that, in the semiconductor device disclosed in claim 10, if conformation difference is caused in the X-direction or the Y-direction, the data of electric resistance values of easily changeable respective different circuit parts-to-be-measured is successively outputted to the outside at a high speed. Consequently, conformation difference detection caused in a both directions can quickly be carried out.